Tips for DMX-512 usage | DMX-512/1990 Specification
Tips for DMX-512 Usage |
1. PRINCIPLE OF DMX-512 COMMUNICATION
For easy understanding of principle of DMX-512 communication, it is possible to simplify whole DMX-512 communication protocol described in details in USITT “DMX512/1990 Digital Data Transmission” specification (see below) to basic principle necessary for users.
Stream of 512 numbers (data) with values 0 to 255 is transmitted to DMX output periodically. This stream represents DMX “channels” or “addresses”. First number in the stream is value of the channel / address Nr. 1, second number in the stream is value of the channel / address Nr. 2, etc. up to 512th number in the stream which is value of the channel / address Nr. 512 (fig. 1).
Figure 1 – Simplified DMX data stream
2. DMX ADDRESSING
2.1 BASIC ADDRESS
Each DMX receiver has own DMX address adjustable by user. This address gives position in the data stream to what the receiver reacts.
Simplest example (fig. 2):
- We have dimmer for one bulb (one DMX channel) which is set to address 3
- Data stream transmitted to DMX bus is 10, 20, 30, 40, … etc.
- The dimmer will accept third address (data at third position in the data stream), i.e. 30
- Since possible range of data values are 0 to 255, the bulb will light with 30/255 (ca 12%) level of brightness
Figure 2 – One-channel receiver
2.2 MULTIPLE ADDRESS
Most of DMX receivers uses more than one DMX channel / address. In that case, the address set on the receiver is position of first value from the data stream to which the receiver will react.
Example (fig. 3):
- We have dimmer for four bulbs (four DMX channels) which is set to address 3
- Data stream transmitted to DMX bus is 10, 20, 30, 40, 50, 60, 70, … etc.
- The dimmer will accept 3rd, 4th, 5th and 6th address (data at these positions in the data stream), i.e. 30, 40, 50 and 60
- The first bulb (A) will light with 30/255 (ca 12%) brightness, the second bulb (B) will light with 40/255 (ca 16%) brightness, the third bulb (C) with 50/255 (ca 20%) brightness and the fourth bulb (D) will light with 60/255 (ca 24%) brightness.
Figure 3 – Four-channel receiver
When two (or more) DMX receivers are used and each of them should work independently, it is necessary to adjust their addresses so that each of the receivers has own exclusive address.
Example (fig. 4):
- We have two four-bulbs dimmers (they both use four DMX channels) and they are controlled independently
- First dimmer is set to address 3
- Second dimmer is set to address 7
- Bulbs connected to first dimmer (A to D) are driven by data on addresses 3, 4, 5 and 6
- Bulbs connected to second dimmer (E to H) are driven by data on addresses 7, 8, 9 and 10
Figure 4 – Two independent receivers
When both (or more) DMX receivers are set to the same address, they will work in parallel manner. If address of second dimmer (in previous example) is set also to 3, the bulbs connected to the second dimmer are driven the same way as the bulbs of the first dimmer – i.e. by data on addresses 3, 4, 5 and 6 (fig. 5).
Figure 5 – Two dependent receivers
2.3 REAL DEVICES
Real DMX receivers use more DMX channels than number of lighting lamps is. E.g. some RGB LED beam with four lamps uses three DMX channels for control of color (R/G/B) of each of the lamps, one DMX channel controls master dimmer for all colors of all lamps and one DMX channel selects pre-defined functions of the beam. So total number of DMX channels used for that beam control is 14.
Example (fig. 6):
- We have beam with four RGB lamps which uses 14 DMX channels (with functions described above)
- Basic DMX address is set to 50
- DMX channels 50 to 52 control color of lamp A, DMX channels 53 to 55 control color of lamp B, DMX channels 56 to 58 control color of lamp C and DMX channels 59 to 61 control color of lamp D
- DMX channel 62 (i.e. Master Dimmer) controls total brightness of all four lamps A to D
- DMX channel 63 switches between pre-defined control functions of the device
Figure 6 – Real 14-channel receiver
2.4 JOINING OF DMX CHANNELS
Sometime a DMX receiver (e.g. moving heads) needs higher resolution of a parameter than 255 steps enabled by data on one DMX channel. Then two DMX channels are used together for that parameter control – the two data bytes are recognized as one number. One channel includes most significant byte and the other channel includes least significant byte of the parameter value. This method enables to use range of the parameter value from 0 up to 65535.
Example (fig. 7):
- A moving head needs values 0 to 1023 for exact adjustment of position of an engine
- The position is controlled by data of two DMX channels with numbers “n” and “n+1” (n channel contents the most significant byte, n+1 channel contents the least significant byte)
- The data on “n” channel are 3, The data on “n+1” channel are 32
- Resulting value for the engine adjustment is then: (n) * 256 + (n+1) = 3 * 256 + 32 = 800
Figure 7 – Two DMX channels used for one parameter control
DMX-512/1990 Specification |
U S I T T
DMX512/1990 DIGITAL DATA TRANSMISSION STANDARD FOR DIMMERS AND CONTROLLERS
A Revision of the DMX512 Standard Published in August 1986
A Project of the USITT Engineering Commission
U S I T T
10 W. 19th St. – Suite 5A
New York, NY 10011-4206
212) 924-9088, (212) 924-9343 FA
This standard describes a method of digital data transmission between controllers and dimmers. It covers electrical characteristic, data format, data protocol, connector type, and cable.
This standard is intended as a guide for:
Equipment manufacturers and system specifiers who wish to integrate systems of dimmers and controllers made by different manufacturers. Equipment manufacturers seeking to adopt a standard controller-dimmer digital transmission protocol. Although widespread adoption of this standard is sought by USITT, compliance with the standard is strictly voluntary. Furthermore, it is not intended as a replacement for existing protocols already manufactured, but rather as an addition to existing protocols which will broaden the installed base of controllers and dimmers that can communicate with each other.
3.0 CROSS REFERENCE
See EIA standards EIA-422A and EIA-485 available from:
Electronic Industries Association
Standard Sales Office
2001 Eye Street NW
Washington, D.C. 2006
4.0 ELECTRICAL ISOLATION
This standard and EIA-485 make no general provisions for electrical isolation. However, suitable optical isolation, transformer isolation, or other means may be employed to prevent the undesirable propagation of voltages which exceed the Common Mode limits of EIA.485. The inclusion of such isolation does not, however, alter the requirement that a transmitter or receiver conforms to EIA-485.
5.0 DATA PROTOCOL
Data transmitted shall be in asynchronous serial format. Dimmer level data shall be transmitted sequentially, beginning with dimmer 1 and ending with the last implemented dimmer, up to a maximum of 512. Prior to the first level transmitted, a RESET signal shall be transmitted followed by a NULL START code. Valid dimmer levels shall be 0 to 255 decimal (00 to FF hexadecimal) representing dimmer control input levels of OFF to FULL in a linear relationship. These numeric values shall not necessarily have any relationship to actual dimmer output, which shall be determined within the dimmer itself.
5.0.1 RESET SIGNAL
The RESET signal (Timing Diagram, Designation #1) shall consist of a BREAK lasting 88 mSeconds (two frame times) or any longer duration. A BREAK shall be defined as a high-to-low transition followed by a low of at least 88 mSeconds. All dimmers and other receiving devices shall interpret any such BREAK as a terminator for any pending transmission/data packet and its end as the start of the MARK AFTER BREAK and START code sequence at the beginning of the next packet.
18.104.22.168 MARK AFTER BREAK
The duration of the MARK separating the RESET/BREAK and the START code (Timing Diagram, Designation #2) shall be not less than 8 µSeconds and not greater than 1 Second. All DMX512/1990 transmitters shall produce a MARK AFTER BREAK of not less than 8 µSeconds. All receivers shall recognize an 8 µSecond MARK AFTER BREAK. Receivers capable of also recognizing the shorter 4 µSecond MARK AFTER BREAK (as specified in the 1986 DMX512 Standard) may be identified and marked as having this capability as per paragraph 11.0
5.0.2 NULL START CODE
The NULL START code shall be defined as a properly framed NULL character (all zeros) following a RESET (Timing Diagram, Designation #3). The NULL START identifies subsequent data as sequential 8-bit dimmer level information.
5.0.3 OTHER OPTIONAL START CODES
In order to provide for future expansion and flexibility, this Standard makes provision for 255 additional START codes (1 through 255 decimal, 01 through FF hexadecimal). For this reason, a dimmer receiver must not accept as 8-bit level data any data packet with a START code other than NULL START following the RESET.
5.0.4 MAXIMUM NUMBER OF DIMMERS
Each data link shall support up to 512 dimmers. Multiple links shall be used where larger numbers of dimmers are required.
5.0.5 MINIMUM NUMBER OF DIMMERS
There shall be no minimum number of dimmers on the data link. DMX512 data packets with levels for less than 512 dimmers may be transmitted, provided that the conditions of this Standard, including Paragraphs 5.0 through 5.0.8, are observed.
5.0.6 DEFINED LINE STATE BETWEEN FRAMES
The time between any two frames of a data packet (Timing Diagram, Designation #4) may vary between 0 µSeconds and 1 Second. The line must remain in a “marking” state during any such idle period greater than 0 µSeconds. A receiver must be capable of accepting a data packet having no idle time (0 µSeconds) between any of its frames.
5.0.7 DEFINED LINE STATE BETWEEN DATA PACKETS
Every data packet transmitted on the data link, regardless of START code or length, must begin with a RESET, MARK AFTER BREAK, and START code sequence as defined above. The time between the second stop bit of the last data byte/frame of one data packet and the falling edge of the beginning of the RESET for the next data packet (Timing Diagram, Designation #6) may vary between 0 µSeconds and 1 Second. The line must remain in an idle (“marking”) state throughout any such period greater than 0 µSeconds. Transmitters, therefore, must not produce multiple BREAKs between data packets. Receivers, however, must be capable of recovering from multiple BREAKs produced by data link errors.
5.0.8 MINIMUM BREAK SPACING
The period between the falling edge at the start of any one BREAK shall be not less than 1196 µSeconds from the falling edge at the start of the next BREAK.
6.0 DATA FORMAT
The data transmission format for each level transmitted shall be as follows:
BIT POSITION DESCRIPTION
– 1 Start Bit, Low or SPACE
– 2 through 9 Dimmer level Data bits, Least Significant Bit to Most Significant Bit Positive logic
– 10, 11 Stop Bits, High or MARK Parity Not transmitted
7.0 DATA RATE
The data rate and associated timing shall be as follows:
– Data Rate 250 Kilobits per second
– Bit Time 4.0 mSeconds
– Frame Time 44.0 mSeconds
– Maximum Update Time for 512 dimmers 22.67 milliseconds
– Maximum Update Rate for 512 dimmers 44.11 times per second
7.1 TIMING DIAGRAM
See Figure 1 for the DMX512/1990 timing diagram.
8.0 LOSS OF DATA TOLERANCE
The receiving device must maintain, for a minimum of 1 Second, the last valid level received for each connected dimmer. Designers of transmitters are reminded that a low number of dimmer level (START CODE 00) updates may be interpreted by a receiver as a loss of data.
8.1 RECEIVER DATA RATE TOLERANCE
DMX512/1990 is intended to make possible the interconnection of lighting control equipment by different manufacturers. It does not specify the minimum performance levels of connected equipment, either by requiring a minimum number of level updates per second be produced by a transmitter, or by requiring that all level updates on the data link be used by the receiver.
The performance of any device incorporating a DMX512/1990 receiver must, however, not be degraded by the presence at its input of the continuous transmission of data packets containing any number of dimmer levels up to the maximum update rates specified in Section 5 and Paragraph 7.0 above.
Where connectors are used, the data link shall utilize 5-pin “XLR” style microphone connectors. Some manufacturers of this connector are:
– ITT Cannon
9.0.1 CONNECTOR SEX
Female connectors shall be utilized on controllers or other transmitting devices and male connectors shall be utilized on dimmers and other receiving devices. In cases where an optional second data link is implemented using the spare pins of the connector for bi-directional transmission, female connectors shall still be utilized on the controller.
9.0.2 CONNECTOR PIN DESIGNATION
Connector Pin Designations shall be as follows:
– PIN 1 -Signal Common (Shield)
– PIN 2 -Dimmer Drive Complement (Data 1 -)
– PIN 3 -Dimmer Drive True (Data 1 +)
– PIN 4 -Optional Second Data Link Complement (Data 2 -)
– PIN 5 -Optional Second Data Link True (Data 2 +)
Cable shall be shielded twisted pair approved for EIA-422/EIA-485 use. Examples of suitable cables are:
– Belden 9841(one pair, no spares provided)
– Alpha 5271 (one pair, no spares provided)
– Belden 9842 (two pairs, one as a spare)
– Alpha 5272 (two pairs, one as a spare)
11.0 MARKING AND IDENTIFICATION
Equipment conforming to this Standard may be marked and identified with “USITT DMX512/1990” or “DMX512/1990”.
Only receivers also capable of accepting a 4 mSecond MARK AFTER BREAK may be marked and identified as “USITT DMX512/1990 (4mSec)” or “DMX512/1990 (4mSec)”.
Compliance with this Standard is the responsibility of the manufacturer, and such marking and identification does not constitute certification or approval by the USITT.
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